电子工程系

Department of Electronic Engineering 

Yu WANG, Ph.D. Lecturer

Department of Electronic Engineering, Tsinghua University, Beijing 100084, China

Tel: +86-10-62784785

Fax: +86-10-62770317

E-mail: yu-wang@tsinghua.edu.cn

Web: http://nics.ee.tsinghua.edu.cn/people/wangyu/index.html

 

 

Education background

Ph.D. (with honor), Electronic Engineering, July 2007

Tsinghua University, Beijing, China

Bachelor of Engineering, Electrical Engineering, June 2002

Tsinghua University, Beijing, China

 

Experience

07/2007-present Assistant Professor, Dept. of Electronic Engineering,Tsinghua Univ.

10/2008-01/2009 Visiting Scholar, Department of Electronic and Computer Engineering The Hong Kong University of Science and Technology

09/2001-01/2007 Visiting Student/Researcher, Hardware Computing GroupMicrosoft Research Asia.

 

Concurrent Academic

Undergraduate

Selected Topics in Circuit and System Division(2010)

Graduate

C/UNIX programming (2010)

Computer-Aided Design of Digital Circuits and Systems (2009-2010)

 

Social service

CONFERENCE

Program Co-Chair, International Conference on Field Programmable Technology (ICFPT) 2011

TPC, IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2009/10

TPC, Asia and South Pacific Design Automation Conference (ASPDAC) 2011

TPC, International Symposium on Low Power Electronics and Design (ISLPED) 2010

TPC, The International Symposium on Quality Electronic Design (ISQED) 2008/09/10

TPC, IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2009/10

TPC, Asia Symposium on Quality Electronic Design (ASQED) 2009/10

Session Chair, International Conference on Field Programmable Technology (ICFPT) 2010

Session Chair, Asia Symposium on Quality Electronic Design (ASQED) 2009/10

Session Chair, International Conference on Green Circuits and Systems (ICGCS) 2010

ACADEMIC ORGANIZATION

Member, IEEE

Reviewer, IEEE Trans on CAD, IEEE Trans on VLSI, IEEE Trans on Computer, IEEE Trans on Parallel and Distributed Systems, International Journal of Electronics, ACM Journal of Emerging Technologies, ACM Trans on Embedded Computing Systems

 

Areas of Research Interests/ Research Projects

Low power and reliability-aware system design

Application specific hardware computing

MPSoC related: Communication, Supply System, and 3D MPSoC

Fast/Parallel circuit analysis

 

Research Status

1. Mitsubishi Heavy Industries – Tsinghua Joint Research Program, “Development of a real-time image processing hardware component”, Jan. 2010 – March. 2011, Principle Investigator.

         The major objective of this research project is to develop a real-time image processing hardware component for vehicle detection and classification with stereo cameras.

2. AMD China University Program, “GPU-based Acceleration for Machine Learning Algorithms”, Jan. 2009 – April 2010, Principle Investigator.

          In this project, we are trying to find GPGPU solutions for accelerating some common machine learning algorithms by carefully analyzing the data parallelism of machine learning algorithms as well as GPU’s architecture.

3. Microsoft Research Asia, “General FPGA-based Acceleration for Machine Learning”, Jan. 2008 – April 2009, Principle Investigator.

          In this project, we tried to find a FPGA solution to accelerate most of machine learning algorithms as an application domain, in order to provide both efficient hardware architecture and interfaces to OS. MapReduce, which is a very successful programming model is considered as one of the possibilities in FPGA based Machine Learning implementations.

4. National Science Funding, China, “Research on FPGA based Anti-Degradation Machine Learning”, Jan. 2009-Dec. 2011, Principle Investigator.

         In this project, FPGA-based anti-aging machine learning is studied. We will dynamically reconfigure FPGA based on the run time information to ensure the lifetime requirement of machine learning algorithms; and try to explore if there exist a new architecture for anti-aging machine learning.

5. Hi-tech Research and Development Program of China (National 863 Project), “Low power Heterogeneous MPSoC Design and Computation based on Sensor Network on Chip,” Jan. 2009-Dec. 2010, Co-Principle Investigator.

          In this project, we systematically study power and reliability threats in low-power high-performance MPSoC and explore effective methodologies and systems to manage these threats. We propose a Sensor Network on Chip (SENoC) to dynamically perform information collection, decision making, and instruction dispatching.

6. National Key Technological Program of China, “Advanced EDA platform development,” August. 2008-Dec. 2010.12, Co-Principle Investigator.

         The object of this project is to build a fast parallel analog/RF circuit simulation platform, since the simulation speed is one of the key obstacles for Analog/RF circuit designers all over the world.

 

Honors And Awards

Two papers are nominated as Best Paper Candidate, ASPDAC 2010.

Best Paper Candidate, CODES 2009.

Best Paper Candidate, ISLPED 2009.

Excellent PhD Dissertation, awarded by Tsinghua University, 2007

 

Academic Achievement

[1] Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie, "Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation", to appear in IEEE Trans on Dependable and Security Computing.

[2] Yu Wang , Ku He, Rong Luo, Hui Wang, Huazhong Yang, “Two-phase Fine-grain Sleep Transistor Insertion Technique in Leakage Critical Circuits,” in IEEE Transaction on VLSI, Volume 16, Issue 9, Sept. 2008 Page(s):1101 - 1113.

[3] Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang, "Leakage Power and Circuit Aging Co-Optimization by Gate Replacement Techniques", to appear in IEEE Trans on VLSI.

[4] Qian Ding, Yu Wang , Hui Wang, Rong Luo, Huazhong Yang, Output Remapping Technique for Critical Paths Soft-Error Rate Reduction, to appear in IET Computers & Digital Techniques.

[5] Guangming Yu, Yu Wang, Huazhong Yang, Hui Wang, "Fast-Locking All-Digital Phase-Locked Loop with Digitally Controlled Oscillator Tuning Word Estimating and Presetting", to appear in IET Circuits, Devices & Systems.

[6] Yibo Chen, Yu Wang, Yuan Xie, Andres Takach, “Parametric Yield Driven Resource Binding in Behavioral Synthesis with Multi-Vth/Vdd Library”, in ASPDAC 2010. (Best paper candidate)

[7] Yi Shan, Bo Wang, Jing Yan, Yu Wang, Ningyi Xu, Huazhong Yang, "FPMR: MapReduce Framework on FPGA -- A Case Study of Rankboost Acceleration ", in ISFPGA 2010.

[8] Yu Wang, Jiang Xu, Shengxi Huang, Weichen Liu, Huazhong Yang, "A Case Study of On-Chip Sensor Network in Multiprocessor System-on-Chip", in CASES 2009.

[9] Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang, "Variation-Aware Supply Voltage Assignment for Minimizing Circuit Degradation and Leakage", 2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09, pp 39-44, 2009/8/19 (Best paper candidate).

[10] Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, and Huazhong Yang, "On the efficacy of Input Vector Control to mitigate NBTI effects and leakage power", 10th International Symposium on Quality Electronic Design, ISQED 2009, pp 19-26, 2009/3/16.

For detailed publication list, please refer to:

http://nics.ee.tsinghua.edu.cn/people/wangyu/publications.htm